As electronic devices get smaller, the components within these devices must get smaller as well. Because of this, there has been an increased demand for the miniaturization of components and greater packaging density. Integrated Circuit (IC) package density is primarily limited by the area available for die mounting and the height of the package. One way of increasing the density is to stack multiple die or packages vertically in an IC package. Stacking multiple die or packages will maximize function and efficiency of the semiconductor package.
Stacked semiconductor packages are different from regular semiconductor packages in that they have lands on both the top and bottom surfaces of the stacked semiconductor package. A problem may arise on the top side of the stacked semiconductor package as the mold cap/area may encroach on the inner row of the lands. Because of this problem, many stacked semiconductor packages use a solder mask defined land pad opening on the inner row of all land pads. However board level reliability is believed to be proportional to exposed land pad metal area. The use of solder mask defined land pads reduces the amount of exposed land pad metal area and this reduces board level reliability.
Therefore, a need existed to provide a device and method to overcome the above problem.